Conventionally, there has been known a semiconductor device that includes a semiconductor element and metal members disposed on both sides of the semiconductor element, each of the metal members and the semiconductor element being electrically connected through solder as described in Patent Literature 1.
In Patent Literature 1, a heat sink block (hereinbelow, referred to as a first metal member) is disposed on a first face of the semiconductor element, and the semiconductor element and the first metal member are electrically connected through a first solder. A metal plate (hereinbelow, referred to as a second metal member) is disposed on a rear face of the semiconductor element, the rear face being located opposite to the first face, and the semiconductor element and the second metal member are electrically connected through a second solder.
As described in Patent Literature 1, the first face of the semiconductor element has a solder region which is a region connected to the first solder and a non-solder region which is not to be soldered. A plurality of control pads are disposed in the non-solder region. These control pads are disposed along one side in the first face having a rectangular plane shape. Accordingly, the center of the solder region is displaced from the center of the semiconductor element. Thus, the first metal member is disposed at a position displaced from the center of the semiconductor element. Thus, when the first solder and the second solder are reflowed with the semiconductor element stacked on the second metal member with the second solder interposed therebetween and the first metal member stacked on the semiconductor element with the first solder interposed therebetween, the semiconductor element is disadvantageously tilted. The tilt occurs not only when the reflow is performed. When at least the second solder, among the first solder and the second solder, is molten in the stacked state in forming the semiconductor device, the Lilt occurs. In this manner, the tilt occurs during melt-joining.
When the semiconductor element is tilted in this manner, it is difficult to inspect each of the solders by using, for example, a scanning acoustic tomograph (SAT) after the formation of the semiconductor device. In the inspection using the SAT, for example, ultrasonic waves are transmitted from the first metal member in an inspection range from the first metal member to a predetermined depth in the stacking direction, and the reflected waves are received to inspect a connection state of the solder (for example, the presence or absence of a void). In this case, the first solder and the second solder are separately inspected. However, when the tilt occurs as described above, the first solder is present in the inspection range of the second solder in the stacking direction, and the connection state of the second solder cannot be evaluated. The same problem occurs in the evaluation of the connection state of the first solder. Further, it becomes difficult to connect bonding wires to the control pads.